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A DFA-Resistant and Masked PRESENT with Area Optimization for RFID Applications | |
2017-09 | |
发表期刊 | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS
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ISSN | 1539-9087 |
卷号 | 16期号:4 |
发表状态 | 已发表 |
DOI | 10.1145/3035543 |
摘要 | Radio-Frequency Identification (RFID) tag-based applications are usually resource constrained and security sensitive. However, only about 2,000 gate equivalents in a tag can be budgeted for implementing security components [27]. This requires not only lightweight cryptographic algorithms such as PRESENT (around 1,000 gate equivalents) but also lightweight protections against modern Side Channel Attacks (SCAs). With this budget, the first-order masking and fault detection are two suitable countermeasures to be developed for PRESENT. However, if both countermeasures are applied without any optimization, it will significantly exceed the given area budget. In this work, we optimize area to include both countermeasures to maximize the security for PRESENT within this RFID area budget. The most area-consuming parts of the proposed design are the masked S-boxes and the inverse masked S-boxes. To optimize the area, we have deduced a computational relationship between these two parts, which enables us to reuse the hardware resource of the masked S-boxes to implement the inverse masked S-boxes. The proposed design takes up only 2,376 gates with UMC 65nm CMOS technology. Compared with the unoptimized design, our implementation reduces the overall area by 28.45%. We have tested the effectiveness of the first-order Differential Power Analysis (DPA) and Differential Fault Analysis (DFA) -resistant countermeasures. Experimental results show that we have enhanced the SCA resistance of our PRESENT implementation. |
关键词 | DFA-resistant side channel attacks PRESENT cipher RFID lightweight |
收录类别 | SCI ; EI |
语种 | 英语 |
WOS研究方向 | Computer Science |
WOS类目 | Computer Science, Hardware & Architecture ; Computer Science, Software Engineering |
WOS记录号 | WOS:000425114000012 |
出版者 | ASSOC COMPUTING MACHINERY |
EI入藏号 | 20173304049785 |
EI主题词 | Budget control ; Fault detection ; Radio frequency identification (RFID) |
EI分类号 | Radio Systems and Equipment:716.3 |
WOS关键词 | BLOCK CIPHER ; AES ; IMPLEMENTATIONS ; PERFORMANCE ; SECURITY ; DEVICES ; DES |
原始文献类型 | Article |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | https://kms.shanghaitech.edu.cn/handle/2MSLDSTB/14261 |
专题 | 信息科学与技术学院_PI研究组_哈亚军组 |
通讯作者 | Wang, Yi |
作者单位 | 1.ASTAR, Inst Infocomm Res, Singapore, Singapore 2.ShanghaiTech Univ, Sch Informat Sci & Technol, Shanghai, Peoples R China |
推荐引用方式 GB/T 7714 | Wang, Yi,Ha, Yajun. A DFA-Resistant and Masked PRESENT with Area Optimization for RFID Applications[J]. ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS,2017,16(4). |
APA | Wang, Yi,&Ha, Yajun.(2017).A DFA-Resistant and Masked PRESENT with Area Optimization for RFID Applications.ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS,16(4). |
MLA | Wang, Yi,et al."A DFA-Resistant and Masked PRESENT with Area Optimization for RFID Applications".ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS 16.4(2017). |
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