×
验证码:
换一张
忘记密码？
记住我
×
统一认证登录
登录
中文版
|
English
上海科技大学知识管理系统
ShanghaiTech University Knowledge Management System
统一认证登录
登录
注册
ALL
ORCID
题名
作者
发表日期
关键词
文献类型
DOI
出处
存缴日期
收录类别
出版者
学习讨论厅
图片搜索
粘贴图片网址
首页
研究单元&专题
作者
文献类型
学科分类
知识图谱
知识整合
学习讨论厅
在结果中检索
研究单元&专题
信息科学与技术学院 [6]
作者
娄鑫 [5]
周平强 [4]
万浩川 [3]
虞晶怡 [2]
饶朝林 [2]
郑越洋 [2]
更多...
文献类型
会议论文 [4]
期刊论文 [2]
发表日期
2024 [3]
2023 [1]
2022 [1]
2020 [1]
出处
14TH USENI... [1]
AICAS 2023... [1]
APCCAS 202... [1]
IEEE TRANS... [1]
IEEE TRANS... [1]
PROCEEDING... [1]
更多...
语种
英语 [6]
资助项目
Central Gu... [1]
National K... [1]
资助机构
收录类别
EI [6]
CPCI-S [2]
CPCI [1]
SCI [1]
状态
已发表 [6]
×
知识图谱
KMS
反馈留言
浏览/检索结果:
共6条，第1-6条
帮助
已选(
0
)
清除
条数/页：
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
排序方式：
请选择
题名升序
题名降序
发表日期升序
发表日期降序
提交时间升序
提交时间降序
WOS被引频次升序
WOS被引频次降序
期刊影响因子升序
期刊影响因子降序
作者升序
作者降序
Reconfigurable and Energy-Efficient Architecture for Deploying Multi-Layer RNNs on FPGA
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, 2024, 卷号: 71, 期号: 12, 页码: 5969-5982
作者:
Xiangyu Zhang
;
Yiren Zhu
;
Xin Lou
Adobe PDF(4791Kb)
|
收藏
|
浏览/下载：189/5
|
提交时间：2024/10/21
Analog storage
Gluing
Multilayer neural networks
Reconfigurable architectures
Reconfigurable hardware
Static random access storage
System-on-chip
% reductions
Energy-efficient architectures
Gated recurrent unit
Hardware accelerators
Long short-term memory
Multi-layers
Neural-networks
Reconfigurable
Recurrent neural network
Short term memory
Ray Reordering for Hardware-Accelerated Neural Volume Rendering
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, 2024, 卷号: 34, 期号: 11, 页码: 11413-11422
作者:
Junran Ding
;
Yunxiang He
;
Binzhe Yuan
;
Zhechen Yuan
;
Pingqiang Zhou
Adobe PDF(11461Kb)
|
收藏
|
浏览/下载：253/4
|
提交时间：2024/07/02
Cache memory
Efficiency
Memory architecture
Network architecture
Cache locality
Hardware
Hardware accelerators
Hardware-accelerated
Image color analysis
Neural volume rendering
Neural-networks
Parallel processing
Ray reordering
Rendering (computer graphic)
ZeroTetris: A Spacial Feature Similarity-based Sparse MLP Engine for Neural Volume Rendering
会议论文
PROCEEDINGS - DESIGN AUTOMATION CONFERENCE, San Francisco, CA, United states, June 23, 2024 - June 27, 2024
作者:
Wan, Haochuan
;
Ma, Linjie
;
Li, Antong
;
Zhou, Pingqiang
;
Yu, Jingyi
Adobe PDF(1288Kb)
|
收藏
|
浏览/下载：204/3
|
提交时间：2024/12/27
Computer graphics equipment
Interactive computer graphics
Matrix algebra
Multilayer neural networks
Particle accelerators
Rendering (computer graphics)
Computational requirements
Hardware accelerators
MAtrix multiplication
Multilayers perceptrons
Neural volume rendering
Neural-networks
Photorealistic rendering
Sparse matrices
Sparse matrix multiplication
Virtual worlds
A Systolic Array with Activation Stationary Dataflow for Deep Fully-Connected Networks
会议论文
AICAS 2023 - IEEE INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE CIRCUITS AND SYSTEMS, PROCEEDING, Hangzhou, China, June 11, 2023 - June 13, 2023
作者:
Haochuan Wan
;
Chaolin Rao
;
Yueyang Zheng
;
Pingqiang Zhou
;
Xin Lou
Adobe PDF(1484Kb)
|
收藏
|
浏览/下载：309/0
|
提交时间：2023/08/18
Energy efficiency
Field programmable gate arrays (FPGA)
Integrated circuit design
Systolic arrays
Activation stationary
Concept demonstration
Data movements
Dataflow
Fully connected networks
Hardware accelerators
Hardware design
Implicit representation
Memory size
Proof of concept
An Energy Efficient Precision Scalable Computation Array for Neural Radiance Field Accelerator
会议论文
APCCAS 2022 - 2022 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, Virtual, Online, China, November 11, 2022 - November 13, 2022
作者:
Chaolin Rao
;
Haochuan Wan
;
Yueyang Zheng
;
Pingqiang Zhou
;
Xin Lou
Adobe PDF(3048Kb)
|
收藏
|
浏览/下载：329/0
|
提交时间：2023/05/12
Computational efficiency
Energy efficiency
Energy efficient
Hardware accelerators
Large amounts
Multiply accumulate operations
Multiplyaccumulate (MAC)
Neural radiance field
Neural rendering
Novel view synthesis
Photo-realistic
Precision-scalable
Rammer: Enabling Holistic Deep Learning Compiler Optimizations with rTasks
会议论文
14TH USENIX SYMPOSIUM ON OPERATING SYSTEMS DESIGN AND IMPLEMENTATION, Virtual, Online, November 4, 2020 - November 6, 2020
作者:
Ma, Lingxiao
;
Xie, Zhiqiang
;
Yang, Zhi
;
Xue, Jilong
;
Miao, Youshan
Adobe PDF(1186Kb)
|
收藏
|
浏览/下载：235/0
|
提交时间：2022/05/27
Deep neural networks
Graphic methods
Optimization
Abstracting
Systems analysis
Program compilers
Data flow analysis
Data flow graphs
Compiler optimizations
Computation tasks
Hardware accelerators
Hardware resources
Hardware utilization
Layered approaches
Library functions
Massively parallels
首页
上一页
1
下一页
末页
