Subsystem under 3D-Storage Class Memory on a chip
2019-03
发表期刊COMPUTERS & ELECTRICAL ENGINEERING (IF:4.0[JCR-2023],3.8[5-Year])
ISSN0045-7906
卷号74页码:47-58
发表状态已发表
DOI10.1016/j.compeleceng.2019.01.009
摘要In this paper, we propose a subsystem architecture under 3D-Storage Class Memory (3D-SCM), termed SuS, to solve the memory and power wall problems. Placing the processing unit under the 3D-SCM achieves high performance. We evaluate SuS using gem5 and the GPGPU-Sim simulator. The simulation results for the central processing unit (CPU)-based SuS architecture reveal a 100% performance improvement and a 73% energy reduction compared to the CPU architecture using dual in-line memory modules and a 4% performance improvement with a 27% energy reduction compared to the CPU architecture using hybrid memory cube. Moreover, the graphics processing unit (GPU)-based SuS architecture simulation results on the neural network benchmark demonstrate performance improvements of 17% and 7% compared to GPU architectures with graphics double data rate series memory and high bandwidth memory, respectively. (C) 2019 Elsevier Ltd. All rights reserved.
关键词3D-Xpoint phase change memory Subsystem under 3D-SCM nvSAN DaysRAM Artificial intelligence Near-data processing
收录类别EI ; SCIE ; SCI
语种英语
资助项目Science and Technology Council of Shanghai[17DZ2291300]
WOS研究方向Computer Science ; Engineering
WOS类目Computer Science, Hardware & Architecture ; Computer Science, Interdisciplinary Applications ; Engineering, Electrical & Electronic
WOS记录号WOS:000474672200004
出版者PERGAMON-ELSEVIER SCIENCE LTD
EI入藏号20190406402067
EI主题词Artificial intelligence ; Benchmarking ; Computer graphics ; Computer graphics equipment ; Data handling ; Memory architecture ; Network architecture ; Phase change memory ; Program processors
EI分类号Computer Systems and Equipment:722 ; Computer Software, Data Handling and Applications:723
原始文献类型Article
引用统计
正在获取...
文献类型期刊论文
条目标识符https://kms.shanghaitech.edu.cn/handle/2MSLDSTB/45585
专题信息科学与技术学院
物质科学与技术学院_硕士生
通讯作者Guo, Jipeng; Jing, Weiliang
作者单位
1.Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, State Key Lab Funct Mat Informat, Shanghai 200050, Peoples R China
2.Univ Chinese Acad Sci, Beijing 100049, Peoples R China
3.Shanghai Xinchu Integrated Circuit Inc, Shanghai 200122, Peoples R China
4.ShanghaiTech Univ, Sch Informat Sci & Technol, Shanghai 201210, Peoples R China
推荐引用方式
GB/T 7714
Guo, Jipeng,Wang, Haibo,Jing, Weiliang,et al. Subsystem under 3D-Storage Class Memory on a chip[J]. COMPUTERS & ELECTRICAL ENGINEERING,2019,74:47-58.
APA Guo, Jipeng.,Wang, Haibo.,Jing, Weiliang.,Li, Haixin.,Du, Yuan.,...&Chen, Bomy.(2019).Subsystem under 3D-Storage Class Memory on a chip.COMPUTERS & ELECTRICAL ENGINEERING,74,47-58.
MLA Guo, Jipeng,et al."Subsystem under 3D-Storage Class Memory on a chip".COMPUTERS & ELECTRICAL ENGINEERING 74(2019):47-58.
条目包含的文件
文件名称/大小 文献类型 版本类型 开放类型 使用许可
个性服务
查看访问统计
谷歌学术
谷歌学术中相似的文章
[Guo, Jipeng]的文章
[Wang, Haibo]的文章
[Jing, Weiliang]的文章
百度学术
百度学术中相似的文章
[Guo, Jipeng]的文章
[Wang, Haibo]的文章
[Jing, Weiliang]的文章
必应学术
必应学术中相似的文章
[Guo, Jipeng]的文章
[Wang, Haibo]的文章
[Jing, Weiliang]的文章
相关权益政策
暂无数据
收藏/分享
所有评论 (0)
暂无评论
 

除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。