Caiti: I/O transit caching for persistent memory-based block device

doi:10.1016/j.sysarc.2024.103109

	Caiti: I/O transit caching for persistent memory-based block device
	Xu, Qing; Jiang, Qisheng; Wang, Chundong
	2024-03-13
发表期刊	JOURNAL OF SYSTEMS ARCHITECTURE (IF:3.7[JCR-2023],3.6[5-Year])
ISSN	1383-7621
EISSN	1873-6165
卷号	150 页码:103109
发表状态	已发表
DOI	10.1016/j.sysarc.2024.103109
摘要	Byte-addressable non-volatile memory (NVM) sitting on the memory bus is employed to make persistent memory (pmem) in general-purpose computing systems and embedded systems for data storage. Researchers develop software drivers such as the block translation table (BTT) to build block devices on pmem, so programmers can keep using mature and reliable conventional storage stack while expecting high performance by exploiting fast pmem. However, our quantitative study shows that BTT underutilizes pmem and yields inferior performance, due to the absence of the imperative in-device cache. We add a conventional I/O staging cache made of DRAM space to BTT. As DRAM and pmem have comparable access latency, I/O staging cache is likely to be fully filled over time. Continual cache evictions and fsyncs thus cause on-demand flushes with severe stalls, such that the I/O staging cache is concretely unappealing for pmem-based block devices. We accordingly propose an algorithm named Caiti with novel I/O transit caching. Caiti eagerly evicts buffered data to pmem through CPU's multi-cores. It also conditionally bypasses a full cache and directly writes data into pmem to further alleviate I/O stalls. Experiments confirm that Caiti significantly boosts the performance with BTT by up to 3.6×, without loss of block-level write atomicity. © 2024 Elsevier B.V.
关键词	Persistent memory Block translation table I/O transit caching
URL	查看原文
收录类别	SCI ; EI
语种	英语
资助项目	National Key R&D Program of China[2022YFB4401700] ; Natural Science Foundation of Shanghai["22ZR1442000","23ZR1442300"]
WOS研究方向	Computer Science
WOS类目	Computer Science, Hardware & Architecture ; Computer Science, Software Engineering
WOS记录号	WOS:001221789600001
出版者	Elsevier B.V.
EI入藏号	20241215781975
EI主题词	Dynamic random access storage
EI分类号	722.1 Data Storage, Equipment and Techniques
原始文献类型	Journal article (JA)
引用统计	正在获取...
文献类型	期刊论文
条目标识符	https://kms.shanghaitech.edu.cn/handle/2MSLDSTB/352513
专题	信息科学与技术学院_硕士生信息科学与技术学院_PI研究组_王春东组
通讯作者	Wang, Chundong
作者单位	上海科技大学
第一作者单位	上海科技大学
通讯作者单位	上海科技大学
第一作者的第一单位	上海科技大学
推荐引用方式 GB/T 7714	Xu, Qing,Jiang, Qisheng,Wang, Chundong. Caiti: I/O transit caching for persistent memory-based block device[J]. JOURNAL OF SYSTEMS ARCHITECTURE,2024,150:103109.
APA	Xu, Qing,Jiang, Qisheng,&Wang, Chundong.(2024).Caiti: I/O transit caching for persistent memory-based block device.JOURNAL OF SYSTEMS ARCHITECTURE,150,103109.
MLA	Xu, Qing,et al."Caiti: I/O transit caching for persistent memory-based block device".JOURNAL OF SYSTEMS ARCHITECTURE 150(2024):103109.