Improve the On-Resistance for 80V NLDMOS with STI Technology in 0.18 UM BCD Process
2022
会议录名称2022 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE, CSTIC 2022
发表状态已发表
DOI10.1109/CSTIC55103.2022.9856810
摘要

In recent years, devices used in power application are required to operate at high voltage, high frequency conditions and at low current to save energy. As a result, it is important to improve the specific on-resistance (RON) for switch LDMOS. In this paper, we will aim at 80VnLDMOS in 0.18um BCD process to discuss the composition of on-resistance and analysis the dominated part of RON. This paper also proposes a simple method to improve the RON. Based on no additional masks and complex process flows, the combination of adjusting ratio of field plate and multiple ion implantation in drift region can improve BV and reduce Ron. The method can improve the on-resistance, which are proved by TCAD simulation results. © 2022 IEEE.

关键词BCD process Condition High frequency HF High-voltages Low currents On-resistance Power applications Save energy SIMPLE method Specific-on-resistance
会议名称2022 China Semiconductor Technology International Conference, CSTIC 2022
会议地点Shanghai, China
会议日期June 20, 2022 - June 21, 2022
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收录类别EI
语种英语
出版者Institute of Electrical and Electronics Engineers Inc.
EI入藏号20223712740123
原始文献类型Conference article (CA)
来源库IEEE
文献类型会议论文
条目标识符https://kms.shanghaitech.edu.cn/handle/2MSLDSTB/232003
专题信息科学与技术学院
信息科学与技术学院_硕士生
作者单位
1.School of Information Science and Technology, ShanghaiTech University, Shanghai, China
2.HuaHong Grace Semiconductor Manufacturing Corporation, Shanghai, China
第一作者单位信息科学与技术学院
第一作者的第一单位信息科学与技术学院
推荐引用方式
GB/T 7714
Xiaoming Zhang,Donghua Liu,Haiyang Ling,et al. Improve the On-Resistance for 80V NLDMOS with STI Technology in 0.18 UM BCD Process[C]:Institute of Electrical and Electronics Engineers Inc.,2022.
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