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RefSCAT: Formal Verification of Logic-Optimized Multipliers via Automated Reference Multiplier Generation and SCA-SAT Synergy
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 2, 页码: 791-804
作者:
Rui Li
;
Lin Li
;
Heng Yu
;
Masahiro Fujita
;
Weixiong Jiang
Adobe PDF(6854Kb)
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收藏
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浏览/下载:336/10
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提交时间:2024/08/26
Benchmarking
Boolean functions
Constraint satisfaction problems
Integer programming
Multiplying circuits
Program debugging
Reverse engineering
Software design
Trees (mathematics)
Binary decision
Binary decision diagram
Computer algebra
Decision diagram
Logic
Logic-optimized multiplier
Optimisations
Satisfiability
Symbolic computer algebra
Compositional Verification of Cryptographic Circuits Against Fault Injection Attacks
会议论文
FORMAL METHODS, PT II, FM 2024, null,Milan,ITALY, SEP 09-13, 2024
作者:
Tan, Huiyu
;
Yang, Xi
;
Song, Fu
;
Chen, Taolue
;
Wu, Zhilin
Adobe PDF(595Kb)
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浏览/下载:359/1
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提交时间:2024/10/11
Benchmarking
Boolean functions
Open source software
Compositional verification
Cryptographic algorithms
CryptoGraphics
Design and implementations
Error prones
Fault injection attacks
Hardware implementations
Open source tools
Physical attacks
Sub-circuits
CIMC: A 603TOPS/W In-Memory-Computing C3T Macro with Boolean/Convolutional Operation for Cryogenic Computing
会议论文
2023 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), San Antonio, TX, United states, April 23, 2023 - April 26, 2023
作者:
Yuhao Shu
;
Hongtu Zhang
;
Qi Deng
;
Hao Sun
;
Yajun Ha
Adobe PDF(359Kb)
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浏览/下载:572/1
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提交时间:2023/04/15
Boolean functions
Computing power
Convolution
Cryogenics
Error correction
Bitcell
Cryogenic temperatures
Data retention time
Data-transmission
Energy efficient
Full-swing
High energy efficiency
Leakage resistance
Wire resistance
Write operations
A Recursion and Lock Free GPU-based Logic Rewriting Framework Exploiting Both Intra-node and Inter-node Parallelism
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: PP, 期号: 99, 页码: 1-1
作者:
Li, Lin
;
Li, Rui
;
Ha, Yajun
Adobe PDF(7297Kb)
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收藏
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浏览/下载:472/2
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提交时间:2023/03/17
Boolean functions
Computer circuits
Computer graphics
Concurrency control
Data structures
Locks (fasteners)
Logic Synthesis
Program processors
AIG rewriting
GPU accelerations
Instruction set
Lock-free
Logic rewriting
Parallel processing
Recursions
Rewriting algorithm
Schedule
Time consuming techniques
ESAMPLER: Boosting sampling of satisfying assignments for Boolean formulas via derivation
期刊论文
JOURNAL OF SYSTEMS ARCHITECTURE, 2022, 卷号: 129
作者:
Xu, Yongjie
;
Song, Fu
;
Chen, Taolue
Adobe PDF(2750Kb)
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收藏
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浏览/下载:361/0
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提交时间:2022/07/15
Bayesian networks
Boolean functions
Computational complexity
Inference engines
Random number generation
Boolean formulae
Boolean satisfiability
Classical problems
Constraint-based
Constraint-based sampling
Data optimization
Data testing
Satisfiability solving
Satisfying assignments
State of the art
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