上海科技大学知识管理系统

Asymmetric multi-core processors (AMPs) have been proved to be power-efficient in tablets and mobile platforms. In recent years Intel tries to bring the asymmetric multi-core architecture into desktop platforms. The latest desktop processors integrate high performance "big" cores and power saving "small" cores. This design shows potential to improve system performance in certain circumstances but also increases the complexity of task scheduling. For this reason, Intel further integrates a hardware component called Intel Thread Director (ITD) in such processors to provide heuristics to software scheduler. In this paper, we first provide a thorough insight into the operating logic of ITD. With this knowledge, we reveal three types of inefficiency in current task ITD-guided schedulers. We further discuss and resolve these issues with an assisting kernel module.