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ShanghaiTech University Knowledge Management System
| A 0.59μJ/pixel High-throughput Energy-efficient Neural Volume Rendering Accelerator on FPGA | |
| 2024 | |
| 会议录名称 | PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE |
| ISSN | 0886-5930 |
| 发表状态 | 已发表 |
| DOI | 10.1109/CICC60959.2024.10529071 |
| 摘要 | The photorealistic rendering of virtual world has always been a significant challenge in computer graphics. With the advent of Neural Radiance Fields Rendering (NeRF) [1], the past three years has witnessed the explosive development of Neural Volume Rendering (NVR), a data-driven solution to this long-stand problem. However, the scene-representation characteristics of NVR models, coupled with the utilization of Multi-Layer Perceptron (MLP), pose a challenge for the efficient deployment of NVR to existing graphics hardware and dedicated convolutional neural network (CNN) accelerators. © 2024 IEEE. |
| 关键词 | Convolutional neural networks Energy efficiency Field programmable gate arrays (FPGA) Multilayer neural networks Virtual reality Convolutional neural network Data driven Energy efficient Graphics hardware High-throughput Multilayers perceptrons Photorealistic rendering Scene representation Virtual worlds |
| 会议名称 | 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2024 |
| 出版地 | 345 E 47TH ST, NEW YORK, NY 10017 USA |
| 会议地点 | Denver, CO, United states |
| 会议日期 | April 21, 2024 - April 24, 2024 |
| URL | 查看原文 |
| 收录类别 | EI ; CPCI-S |
| 语种 | 英语 |
| WOS研究方向 | Engineering ; Telecommunications |
| WOS类目 | Engineering, Electrical & Electronic ; Telecommunications |
| WOS记录号 | WOS:001230023800111 |
| 出版者 | Institute of Electrical and Electronics Engineers Inc. |
| EI入藏号 | 20242216152980 |
| EI主题词 | Volume rendering |
| EI分类号 | 525.2 Energy Conservation ; 721.2 Logic Elements ; 723 Computer Software, Data Handling and Applications ; 723.2 Data Processing and Image Processing ; 723.5 Computer Applications |
| 原始文献类型 | Conference article (CA) |
| 文献类型 | 会议论文 |
| 条目标识符 | https://kms.shanghaitech.edu.cn/handle/2MSLDSTB/381447 |
| 专题 | 信息科学与技术学院_博士生 信息科学与技术学院_PI研究组_娄鑫组 信息科学与技术学院_PI研究组_虞晶怡组 信息科学与技术学院_PI研究组_周平强组 信息科学与技术学院_硕士生 信息科学与技术学院_本科生 |
| 共同第一作者 | Yuan, Binzhe |
| 通讯作者 | Lou, Xin |
| 作者单位 | 1.Shanghai Tech University, China 2.GGU Technology Co., Ltd, China |
| 第一作者单位 | 上海科技大学 |
| 通讯作者单位 | 上海科技大学 |
| 第一作者的第一单位 | 上海科技大学 |
| 推荐引用方式 GB/T 7714 | Yuan, Zhechen,Yuan, Binzhe,Gu, Yuhan,et al. A 0.59μJ/pixel High-throughput Energy-efficient Neural Volume Rendering Accelerator on FPGA[C]. 345 E 47TH ST, NEW YORK, NY 10017 USA:Institute of Electrical and Electronics Engineers Inc.,2024. |
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