A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations

doi:10.1109/TVLSI.2022.3164756

	A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations
	Jian Chen1,2,3 ; Wenfeng Zhao 4; Yuqi Wang1 ; Yuhao Shu1 ; Weixiong Jiang1 ; Yajun Ha1,5
	2022-06-01
发表期刊	IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
ISSN	1557-9999
卷号	30 期号:6
发表状态	已发表
DOI	10.1109/TVLSI.2022.3164756
摘要	To efficiently implement searching and logic functions with the SRAM-based in-memory computing (IMC), we need to perform computations on bitlines (BLs) (called compute access) via multiple wordline (WL) activations. However, this may cause prominent read disturbance when the IMC is implemented with the standard 6 T SRAM. To address this reliability issue, existing solutions adopt either auxiliary assistance circuits or alternative bitcell topologies, but they lead to substantial overheads of the access speed or array density. In this article, we propose a novel 8T compute SRAM (CSRAM) for reliable and high-speed in-memory searching and compound logic-in-memory computations. Our 8T CSRAM features a pair of pMOS access transistors and split-WLs dedicated to the compute access. A thorough circuit-level analysis reveals that the pMOS-based compute access port is essential for significantly mitigating the read disturbance. Moreover, we propose an elevated precharge voltage scheme and a low-skewed inverter-based sensing amplifier to improve the sensing speed. We have validated the proposed 8T CSRAM design in a 16 Kb array with a 28-nm CMOS technology. Compared to the state-of-the-art 8 T CSRAM, results show that our design is not only reliable but also 3.1 times faster, with a maximum operating frequency upping to 2.44 GHz.
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收录类别	SCI ; SCIE ; EI
来源库	IEEE
引用统计	正在获取...
文献类型	期刊论文
条目标识符	https://kms.shanghaitech.edu.cn/handle/2MSLDSTB/178446
专题	信息科学与技术学院信息科学与技术学院_PI研究组_哈亚军组信息科学与技术学院_硕士生信息科学与技术学院_博士生
作者单位	1.School of Information Science and Technology, ShanghaiTech University, Shanghai, China 2.Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai, China 3.School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences, Beijing, China 4.Department of Electrical and Computer Engineering, Binghamton University SUNY, Binghamton, NY, USA 5.Shanghai Engineering Research Center of Energy Efficient and Custom AI IC, Shanghai, China
第一作者单位	信息科学与技术学院
第一作者的第一单位	信息科学与技术学院
推荐引用方式 GB/T 7714	Jian Chen,Wenfeng Zhao,Yuqi Wang,et al. A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,2022,30(6).
APA	Jian Chen,Wenfeng Zhao,Yuqi Wang,Yuhao Shu,Weixiong Jiang,&Yajun Ha.(2022).A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations.IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,30(6).
MLA	Jian Chen,et al."A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations".IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 30.6(2022).